Lithography systems, including ion, laser, EUV and electron beam systems, all require means to process and deliver a pattern to some kind of writing means. A well known way to accomplish this is by using a mask, and projecting this mask onto a substrate. As the resolution becomes smaller and smaller, these masks have become more difficult to produce. Furthermore, the (optical) means for projecting these masks have become very complex.
A way of to overcome this problem is by using maskless lithography.
Maskless lithography systems can be divided in two classes. In the first class the pattern data are sent towards the individual radiation source or sources. By tuning the intensity of the sources at the right times, a pattern can be generated on the substrate, which is most often a wafer or a mask. The switching of sources may get problematic when the switching speed increases, for instance due to a settling time or a source, which can be too long.
The second class of maskless lithography systems on the other hand comprises either continuous sources or sources operating at constant frequency. The pattern data are now sent towards modulation means, which completely or partly stop the emitted beams from reaching the target exposure surface when necessary. By controlling these modulation means while moving over the target exposure surface, a pattern is written. The modulation means are less critical for settling times. A lot of maskless lithography systems designed to achieve a higher throughput are therefore using modulation means.
In U.S. Pat. No. 5,834,783, U.S. Pat. No. 5,905,267 and U.S. Pat. No. 5,981,954, for instance, a maskless electron beam lithography system with one electron source is disclosed. The emitted electron beam is expanded, collimated and additionally split by an aperture array into a plurality of beamlets. A blanker array fed with pattern data stops the individual beamlets when a control signal is given. The obtained image is then reduced by a reduction electron optical system and projected on a wafer.
In US-A-1-20010028042, US-A-1-20010028043, US-A-1-20010028044, WO-A1-02/054465, WO-A1-02/058118 and WO-A1-02/058119, a maskless electron beam lithography system using a plurality of electron sources is disclosed. The emitted electron beamlets pass a blanker array, which deflects the individual electron beamlets when the appropriate control signal is given. The electron beams are shaped by a shaping array, and focused on a wafer.
In WO-01/18606 and U.S. Pat. No. 6,285,488 an optical lithography system is disclosed which uses a spatial light modulator (SLM) to modulate a light beam. A light source emits light pulses directed towards the SLM. The SLM comprises an array of deformable mirrors, which reflect the emitted beam towards a substrate or towards a beam stop structure depending on a control signal sent to the mirror involved.
The current invention is based on the following insight and understanding of the fundamentals of lithography.
A mask is a highly efficient way to store a pattern, the amount of raw data to describe a pattern is enormous. Moreover, for a commercially acceptable throughput, the data must be transported towards the writing means at a very high data rate. Additionally the high data rate must be obtained within limited space. It was up to now not recognized that improvement of the data path in maskless lithography systems has a profound effect on the through-put of these Systems.
The information on a mask is normally used to transfer a pattern from the mask on a certain area on the target exposure surface. This area is called a die. To get an idea of the amount of data that has to be transferred, imagine a die of 32 mm by 26 mm. Now consider that somebody wants to write a pattern with a critical dimension (CD) of 45 nm. Then there are 4.1*1011 CD-elements on a die. If each CD element consists of at least 30*30 pixels to satisfy the requirements, and if there is only one bit needed to represent the intensity of said pixel, the information present on a mask is represented by about 3.7*1014 bits. Say a commercially acceptable throughput for a maskless lithography system is about 10 wafers/hr. If there are 60 dies on a wafer, 60 times 3.7*1014 bits have to be transported towards the modulation means per wafer. So 600 times 3.7*1014 bits have to be transported towards the modulation means in 3600 seconds to get the desired throughput. This corresponds to a data transfer rate of about 60 Tbit/s!
In all mentioned systems the control signals are sent electronically towards the modulation means. However, the bandwidth of a metal wire is limited. The limit on the bandwidth of an electrical interconnect is related to the maximum total capacity of an electrical interconnect Bmax, to the overall cross-section A and the length of the electrical interconnect L in the following way:Bmax=B0*(A/L2)
The constant of proportionality B0 is related to the resistivity of copper interconnects. For typical multichip module (MCM) technologies B0 is about 1016 bit/s. For on-chip lines its value is about 1016 bit/s. The values are almost independent on the particular fabrication technology.
The limit on the bandwidth of the electrical interconnect is furthermore independent of its configuration. Whether the interconnect is made up of many slow wires or a few fast wires up to the point where other effect start to limit the performance makes no difference.
The desired total capacity of the electrical interconnect is 100*1012=1014 bit/s. This corresponds to a ratio of the overall cross-section to the square of the length of the electrical interconnect or 10−1 in the case of a MCM and 10−2 in the case of an on-chip connection. So if L is 1 m., the overall cross-section of the copper that is needed is 0.01-0.1 m2! Compare that number with the size of a die that is written, which is 0.0008 m2, and it is evidently impossible to establish the data transfer without a demagnification of at least 10 after the pattern information is added to the light beam.
Another approach to visualize the problem is to use the typical speed of an electrical interconnect, which is in the order of 1 Gbit/s. So to transfer 100 Tbit/s, 100,000 copper wires are needed! This takes an enormous amount of space and is difficult to handle.